EPM240T100I5 vs EPM240GT100I5N 比較
詳細並排比較 EPM240T100I5 由 Intel 與 EPM240GT100I5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM240T100I5 | EPM240GT100I5N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX II | MAX II |
| Series | EPM240 | — |
| Device Sub-family | EPM240T100 | — |
| Logic Elements (LE) | 240 | — |
| Equivalent Macrocells | 192 | 192 |
| User Flash Memory (UFM) | 8 Kbits | — |
| Maximum User I/O Pins | 80 | — |
| 封裝 | TQFP-100 (100-pin) | 100-pin TQFP (14x14 mm, 0.5 mm pitch) |
| 工作溫度 | -40C to +100C (industrial) | -40 °C to +100 °C (Industrial) |
| Speed Grade | I5 | — |
| Core Voltage | 3.3 V | — |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Propagation Delay (typical) | 4-7 ns | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) ISP |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: rohs status] | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 240 |
| User I/Os | — | 80 |
| Propagation Delay (tPD) | — | 4.7 ns |
| Internal Performance (fMAX) | — | 304 MHz |
| Embedded Non-Volatile Memory | — | 8 Kbits user Flash |
| Process Technology | — | 0.18 µm 6-layer-metal Flash CMOS |
| Supply Voltage - Core (VCCINT) | — | 1.71 V to 1.89 V (3.3 V tolerant for MAX II G variant) |
| I/O Bank Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V MultiVolt I/O |
| Lead-Free / RoHS | — | Yes (suffix N) |