EPM240T100I5N vs EPM240T100C4N 比較

詳細並排比較 EPM240T100I5N 由 Intel 與 EPM240T100C4N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM240T100I5N EPM240T100C4N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Series MAX II —
Device Type CPLD (Complex Programmable Logic Device) —
Logic Elements (LE) 240 —
Macrocells 192 —
User I/O Pins 80 —
On-chip User Flash Memory (UFM) 8 Kbits —
Process Technology 0.18 µm, 6-layer-metal flash 0.18 µm
封裝 TQFP-100 —
安裝類型 Surface Mount Surface Mount
Core Supply Voltage (VCCINT) 3.0 V to 3.6 V (3.3 V nominal) —
I/O Bank Supply (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) —
Typical Propagation Delay (tPD) 7 ns (approx., I5 speed grade) —
工作溫度範圍 -40 °C to +100 °C (industrial, I-temp) —
Programming Interface JTAG (IEEE 1149.1) / ISP —
RoHS 狀態 Compliant Compliant (lead-free, 'N' suffix)
Configuration Storage Non-volatile flash (instant-on, no external PROM) —
Family — MAX II
Device — EPM240
Macro Cells — 192
Logic Elements — 240
Propagation Delay (tPD) — 4.7 ns (max)
Maximum Frequency — 247.5 MHz
User I/O — 80
Supply Voltage - Internal — 2.5 V / 3.3 V
I/O Voltage (MultiVolt) — 1.5 V / 1.8 V / 2.5 V / 3.3 V
Programmable Type — In-System Programmable (Flash)
封裝 / 外殼 — 100-TQFP
工作溫度 — 0 °C to +85 °C (commercial, 'C' suffix)
JTAG Support — IEEE 1149.1 boundary-scan

資料表與資源

瀏覽所有產品 建立 BOM 索取報價