EPM240ZM100C6N vs EPM240T100C5N 比較
詳細並排比較 EPM240ZM100C6N 由 Intel 與 EPM240T100C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM240ZM100C6N | EPM240T100C5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX II | MAX II |
| Logic Elements | 240 | — |
| Macro Cells | 192 | — |
| User I/Os | 80 | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Max Internal Frequency | 184.1 MHz | — |
| Global Clocks | 4 | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Process Technology | 0.18 µm 6-layer-metal flash | 0.18 µm, 6-layer-metal flash |
| Core Supply Voltage | 1.8 V | — |
| I/O Supply Voltages (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V | — |
| Standby Current | 25 µA typical | — |
| 封裝 | 100-MBGA (Micro FineLine BGA), 6 × 6 mm, 0.5 mm pitch | 100-pin TQFP (T100), 14x14 mm |
| 工作溫度 | -40 °C to +125 °C | 0 °C to +85 °C (commercial, 'C' suffix) |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| Programming | JTAG ISP (in-system programmable) | — |
| Lead Free | Yes | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 240 |
| Equivalent Macrocells | — | 192 |
| On-Chip User Flash | — | 8 Kbits |
| Maximum User I/O Pins | — | 80 |
| Number of I/O Banks | — | 4 |
| Pin-to-Pin Delay (speed grade 5) | — | 4.7 ns |
| Maximum Internal Frequency | — | 201.1 MHz |
| Core Supply Voltage (VCCINT) | — | 2.5 V / 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| RoHS 狀態 | — | Compliant (lead-free) |