EPM3032ATI44-10N vs EPM3032ATC44-4N 比較

詳細並排比較 EPM3032ATI44-10N 由 Intel 與 EPM3032ATC44-4N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM3032ATI44-10N EPM3032ATC44-4N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 啟用中
Family MAX 3000A MAX 3000A CPLD family (Altera/Intel)
Logic Capacity 600 usable gates —
Number of Macrocells 32 —
Number of User I/Os 34 —
封裝 / 外殼 TQFP-44 (10x10 mm, 0.8 mm pitch) —
Supply Voltage (VCCINT) 3.0 V to 3.6 V (3.3 V typical) 3.3 V
MultiVolt I/O Interface 5.0 V, 3.3 V, 2.5 V compatible —
Pin-to-Pin Delay (tPD) 10 ns —
Counter Frequency (fCNT) 103.1 MHz —
Setup Time (tSU) [DATA_NEEDED: setup time] —
Programmability In-System Programmable (ISP) via IEEE Std. 1149.1 JTAG —
ISP Standard IEEE Std. 1532 compliant —
Configuration Memory Non-volatile EEPROM EEPROM (non-volatile, in-system programmable)
Hot-Socketing Support Yes —
工作溫度 -40C to +85C (industrial, 'I' grade) —
安裝類型 Surface Mount Surface Mount
RoHS 狀態 RoHS Non-Compliant (contains lead) [DATA_NEEDED: RoHS status from data]
Lead-Free Status Contains lead —
Series — MAX 3000A
Macro Cells — 32
Logic Array Blocks (LABs) — 2
User I/Os — 34
Propagation Delay (tPD) — 4.5 ns
Maximum Frequency — 227.3 MHz
I/O Tolerance — 5.0 V tolerant inputs
工作溫度範圍 — 0C to +70C (commercial)
封裝 — 44-pin TQFP
Programming Interface — IEEE 1149.1 JTAG, IEEE 1532 ISP
Boundary-Scan (BST) — Compliant with IEEE 1149.1

資料表與資源

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