EPM3064ALC44-10N vs EPM3032ALI44-10N 比較
詳細並排比較 EPM3064ALC44-10N 由 Altera 與 EPM3032ALI44-10N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM3064ALC44-10N - MAX 3000A CPLD, 64 Macrocells, 34 I/O | Intel / Altera
EPM3064ALC44-10N Obsolete規格比較
| 參數 | EPM3064ALC44-10N | EPM3032ALI44-10N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Product Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 64 | — |
| Logic Array Blocks (LABs) | 4 | — |
| User I/O Pins | 34 | — |
| Usable Gates | 1,250 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 227.3 MHz | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Bank Voltage (VCCIO) | 3.0 V to 3.6 V (MultiVolt) | — |
| Configuration Memory | CMOS EEPROM | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG, IEEE 1532 compliant) | — |
| 封裝 | 44-pin PLCC (LC44) | 44-LCC (J-Lead), PLCC-44 |
| 安裝類型 | Surface Mount (PLCC socket compatible) | — |
| 工作溫度 | [DATA_NEEDED: commercial / industrial grade] | — |
| RoHS 狀態 | Compliant | Non-Compliant |
| Open-Drain Output Option | Yes (per I/O pin) | — |
| Output Slew-Rate Control | Programmable | — |
| Programmable Type | — | In System Programmable (ISP) |
| Family | — | MAX 3000A |
| Number of Macrocells | — | 32 |
| Number of Usable Gates | — | 600 |
| Number of I/O | — | 34 |
| Logic Elements / Blocks | — | 2 |
| Pin-to-Pin Delay (tPD) | — | 10 ns (speed grade -10) |
| Counter Frequency | — | 227.3 MHz |
| Core Supply Voltage | — | 3.3 V |
| I/O Voltage Support (MultiVolt) | — | 5.0 V / 3.3 V / 2.5 V |
| Program Memory Type | — | EEPROM (non-volatile) |
| Programming Interface | — | IEEE Std. 1149.1 JTAG |
| Operating Temperature Grade | — | Industrial |
| Lead Free Status | — | Contains Lead |
| PCI Compliance | — | PCI SIG Revision 2.2 (speed grades -4/-5/-6/-7/-10) |