EPM3064ALC44-4N vs EPM3064ATC44-10N 比較

詳細並排比較 EPM3064ALC44-4N 由 Intel 與 EPM3064ATC44-10N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EPM3064ALC44-4N EPM3064ALC44-4N - 64-Macrocell CPLD, 4.5ns, 44-PLCC | Intel

EPM3064ALC44-4N - 64-Macrocell CPLD, 4.5ns, 44-PLCC | Intel

EPM3064ALC44-4N ⚠ 最後購買機會
Altera
EPM3064ATC44-10N EPM3064ATC44-10N - 64-Macro Cell MAX 3000A CPLD | Altera

EPM3064ATC44-10N - 64-Macro Cell MAX 3000A CPLD | Altera

EPM3064ATC44-10N ✓ 啟用中

規格比較

參數 EPM3064ALC44-4N EPM3064ATC44-10N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 啟用中
Family MAX 3000A MAX 3000A
Logic Elements / Macrocells 64 macrocells —
Logic Array Blocks (LABs) 2 4
Usable Gates 1.25K 1250
Number of I/O Pins 34 —
Propagation Delay (tPD) 4.5 ns —
Maximum Operating Frequency 222.2 MHz —
Supply Voltage - Core 3.3 V —
I/O Logic Level Support 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
Program Memory Type EEPROM (in-system programmable) —
Programming Interface IEEE Std 1149.1 JTAG —
封裝 44-pin PLCC (J-lead) TQFP-44 (10x10 mm)
安裝類型 Surface Mount Surface Mount
工作溫度 0C to +70C (commercial) 0C to +70C (commercial)
Hot Socketing Supported —
RoHS 狀態 [DATA_NEEDED: RoHS compliance status] Compliant
Device Type — CPLD (Complex Programmable Logic Device)
Macro Cells — 64
User I/O Pins — 34
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Counter Frequency — 192.3 MHz
Supply Voltage (VCCINT) — 3.3 V
I/O Standard — MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V)
Configuration Memory — EEPROM (non-volatile)
In-System Programming — IEEE Std. 1532 compliant
Boundary-Scan Test — IEEE Std. 1149.1 (JTAG) compliant
Pin-Locking — Yes (across design iterations)

資料表與資源

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