EPM3064ATC44-10N vs EPM3032A-TC44-10 比較
詳細並排比較 EPM3064ATC44-10N 由 Altera 與 EPM3032A-TC44-10 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM3064ATC44-10N | EPM3032A-TC44-10 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 1250 | — |
| Macro Cells | 64 | — |
| User I/O Pins | 34 | 34 |
| Logic Array Blocks (LABs) | 4 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 192.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Standard | MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) | — |
| Configuration Memory | EEPROM (non-volatile) | CMOS EEPROM (non-volatile) |
| In-System Programming | IEEE Std. 1532 compliant | — |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) compliant | — |
| 封裝 | TQFP-44 (10x10 mm) | TQFP-44 |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0C to +70C (commercial) | — |
| RoHS 狀態 | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Pin-Locking | Yes (across design iterations) | — |
| Macrocells | — | 32 |
| Logic Array Blocks | — | 2 |
| Logic Gates | — | 600 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Internal Frequency | — | 227.3 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 3.0 V to 3.6 V (typ. 3.3 V) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Output Enables | — | 6 |
| Operating Temperature (Commercial) | — | 0 °C to +70 °C |
| Process Technology | — | CMOS EEPROM |