EPM3064ATC44-7 vs EPM3064ATC44-10 比較

詳細並排比較 EPM3064ATC44-7 由 Altera 與 EPM3064ATC44-10 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM3064ATC44-7 EPM3064ATC44-10
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 64 —
Logic Array Blocks 4 —
Usable Gates 1.25K 1,250
User I/O Pins 34 —
腳位數 44 —
封裝 TQFP-44 TQFP-44, 10 x 10 mm, 0.8 mm pitch
Speed Grade -7 (7.5 ns tPD) —
Pin-to-Pin Propagation Delay 7.5 ns —
Maximum Counter Frequency 192.3 MHz —
Supply Voltage (Core) 3.3 V —
I/O Logic Compatibility 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
Programming Interface IEEE Std. 1149.1 JTAG (ISP) —
Process Technology CMOS EEPROM —
工作溫度 0C to +70C (Commercial) —
安裝類型 Surface Mount Surface Mount
RoHS 狀態 unknown Non-compliant (legacy Altera, Pb-bearing)
Logic Elements / Macrocells — 64 macrocells
Number of Logic Blocks / LABs — 4 LABs
Propagation Delay (tPD) — 10 ns
Maximum Internal Frequency — 227.3 MHz (counter speed)
Programmable I/Os — 34
Supply Voltage (VCCINT) — 3.0 V to 3.6 V (3.3 V typical)
I/O Bank Voltage (VCCIO) — MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V
Technology — CMOS EEPROM, 5 V tolerant I/O
In-System Programming — IEEE Std. 1532 (JTAG)
Boundary-Scan Support — IEEE 1149.1 (JTAG)
工作溫度範圍 — 0C to +70C (commercial)

資料表與資源

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