EPM3064ATC44-7N vs EPM3064ATI44-10N 比較
詳細並排比較 EPM3064ATC44-7N 由 Altera 與 EPM3064ATI44-10N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM3064ATC44-7N | EPM3064ATI44-10N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 64 | — |
| Logic Array Blocks | 2 | — |
| Usable Gates | 1,250 | 1250 |
| User I/O Pins | 34 | — |
| 腳位數 | 44 | — |
| Speed Grade | -7 (7.5 ns pin-to-pin delay) | — |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| Maximum Counter Frequency | 192.3 MHz (-7 grade) | — |
| Supply Voltage (VCC) | 3.3 V | — |
| MultiVolt I/O | 1.8 V / 2.5 V / 3.3 V | — |
| Programmability | EEPROM, in-system programmable (ISP) | — |
| JTAG Interface | IEEE Std. 1149.1 compliant | — |
| ISP Standard | IEEE Std. 1532 compliant | — |
| Boundary-Scan Test (BST) | Built-in, JTAG-driven | — |
| 封裝 | 44-pin TQFP | 44-pin TQFP |
| 工作溫度 | 0°C to +85°C (commercial) | -40C to +85C (Industrial, "N" suffix) |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | Compliant | Non-Compliant (per digchip datasheet excerpt) |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 64 |
| User I/Os | — | 34 |
| Dedicated Inputs | — | 4 |
| Logic Blocks | — | 4 |
| Pin-to-Pin Delay | — | 10 ns (-10 speed grade) |
| Maximum Frequency (fMAX) | — | 100 MHz |
| Programmable Type | — | In-System Programmable (EEPROM) |
| ISP Interface | — | IEEE Std. 1149.1 (JTAG) |
| ISP Standard Compliance | — | IEEE Std. 1532 |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V (MultiVolt) |
| Process Technology | — | CMOS EEPROM |
| Boundary-Scan Test | — | Built-in (JTAG) |
| Lead-Free Status | — | Contains Lead (per digchip datasheet excerpt) |