EPM3064ATI44-10 vs EPM3064ALI44-10N 比較

詳細並排比較 EPM3064ATI44-10 由 Intel 與 EPM3064ALI44-10N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM3064ATI44-10 EPM3064ALI44-10N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND NRND
Family MAX 3000A —
Product Type CPLD (Complex Programmable Logic Device) —
Programmable Type In-System Programmable (ISP), EEPROM-based In System Programmable (ISP)
Number of Macrocells 64 64
Number of Logic Array Blocks (LABs) 4 —
Number of Usable Gates 1,250 —
Number of User I/O Pins 34 —
封裝 TQFP-44 (10x10 mm, 0.8 mm pitch) 44-pin PLCC (J-Lead)
Pin-to-Pin Delay (tPD) 10 ns —
Maximum Counter Frequency 227.3 MHz —
Supply Voltage (VCCINT) 3.3 V —
I/O Voltage Tolerance 5.0 V tolerant (MultiVolt I/O) —
JTAG Interface IEEE Std. 1149.1 compliant —
ISP Standard IEEE Std. 1532 —
工作溫度 -40C to +85C (Industrial) -40 C to +85 C (Industrial)
RoHS 狀態 Non-Compliant (contains lead, per DigiChip listing) —
Lead Free Status Contains Lead —
安裝類型 Surface Mount Surface Mount (socketable PLCC)
Process Technology CMOS, EEPROM —
Programming Cycles [DATA_NEEDED: typical program/erase endurance] —
Series — MAX 3000A
Number of I/O — 34
Logic Gates — 1250 gates
Number of Logic Elements/Blocks — 4 LABs
Propagation Delay (tPD) — 10 ns (speed grade -10)
Counter Frequency — up to 227.3 MHz
Supply Voltage - Core — 3.3 V
I/O Logic Level Support — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
Programming Interface — IEEE Std. 1149.1 JTAG
Lead Free / RoHS Status — Lead Free, RoHS Compliant
Hot-Socketing Support — Yes
Configuration Memory — CMOS EEPROM (non-volatile)

資料表與資源

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