EPM3064ATI44-10N vs EPM3064ATI44-10NAE 比較
詳細並排比較 EPM3064ATI44-10N 由 Altera 與 EPM3064ATI44-10NAE 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM3064ATI44-10N | EPM3064ATI44-10NAE |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 64 | 64 |
| Usable Gates | 1250 | 1250 |
| User I/Os | 34 | — |
| Dedicated Inputs | 4 | — |
| Logic Blocks | 4 | — |
| Pin-to-Pin Delay | 10 ns (-10 speed grade) | — |
| Maximum Frequency (fMAX) | 100 MHz | [DATA_NEEDED: maximum internal frequency MHz] |
| Programmable Type | In-System Programmable (EEPROM) | — |
| ISP Interface | IEEE Std. 1149.1 (JTAG) | — |
| ISP Standard Compliance | IEEE Std. 1532 | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V (MultiVolt) | — |
| 工作溫度 | -40C to +85C (Industrial, "N" suffix) | -40 °C to +85 °C (industrial) |
| 封裝 | 44-pin TQFP | 44-pin TQFP |
| Process Technology | CMOS EEPROM | — |
| Boundary-Scan Test | Built-in (JTAG) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Lead-Free Status | Contains Lead (per digchip datasheet excerpt) | — |
| RoHS 狀態 | Non-Compliant (per digchip datasheet excerpt) | — |
| Device Family | — | EPM3064A |
| User I/O Pins | — | 34 |
| Logic Elements (LABs) | — | 4 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Supply Voltage VCCINT | — | 3.0 V to 3.6 V |
| I/O Supply Voltage VCCIO | — | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Programmable Technology | — | CMOS EEPROM |
| In-System Programmable | — | Yes (JTAG, IEEE 1149.1) |
| Lead-Free / RoHS | — | Yes (AE suffix) |
| 生命週期狀態 | — | Active (MAX 3000A legacy family) |