EPM3256AFC256-7 vs EPM3256AFI256-10 比較
詳細並排比較 EPM3256AFC256-7 由 Altera 與 EPM3256AFI256-10 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM3256AFC256-7 | EPM3256AFI256-10 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 256 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Usable Gates | 10,000 | — |
| User I/Os | 161 | 161 |
| Pin-to-Pin Logic Delay | 4.5 ns (max) | — |
| Counter Frequency | 227.3 MHz (max) | — |
| Propagation Delay (tpd) | 10 ns | — |
| Core Voltage | 3.3 V | — |
| I/O Compatibility | 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O) | — |
| Process Technology | CMOS EEPROM, 0.30 µm | CMOS EEPROM |
| In-System Programmability | IEEE Std. 1532-compliant 3.3-V ISP | — |
| Boundary-Scan Test | JTAG (IEEE 1149.1) | — |
| 封裝 | FBGA-256 (FineLine BGA), 256 balls | — |
| 工作溫度 | 0 °C to 70 °C (Commercial) | -40C to +85C (Industrial) |
| Speed Grade | -7 | -10 (10 ns pin-to-pin) |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Macrocells | — | 256 |
| Logic Elements / LABs | — | 16 Logic Elements per LAB |
| Propagation Delay (tPD) | — | 10 ns |
| Supply Voltage - Core | — | 3.3 V |
| I/O Voltage Support | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O) |
| Programmability | — | In-System Programmable (ISP) via IEEE 1149.1 JTAG |
| Package Type | — | FBGA-256 (FineLine BGA) |
| 安裝類型 | — | Surface Mount (BGA) |