EPM3256AQI208-10N vs EPM3512AQC208-10-10N 比較
詳細並排比較 EPM3256AQI208-10N 由 Altera 與 EPM3512AQC208-10-10N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM3512AQC208-10-10N - MAX 3000A CPLD 512 Macrocells 208-PQFP | Altera
EPM3512AQC208-10-10N Obsolete規格比較
| 參數 | EPM3256AQI208-10N | EPM3512AQC208-10-10N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 256 | 512 |
| User I/Os | 161 | 172 |
| Usable Gates | 5,000 | 10,000 |
| Logic Elements / LABs | 16 Logic Array Blocks (LABs) | 16 Logic Array Blocks |
| Propagation Delay (tPD) | 10 ns | 10 ns (-10 speed grade) |
| Counter Frequency | 118.7 MHz (max, -10 speed grade) | — |
| Speed Grade | -10 | — |
| Supply Voltage - Core | 3.3 V | — |
| I/O Logic Level Compatibility | 5.0 V, 3.3 V, 2.5 V (MultiVolt I/O) | — |
| 工作溫度 | -40 C to +85 C (industrial) | 0 °C to +70 °C (commercial) |
| 封裝 | 208-pin PQFP (Plastic Quad Flat Pack) | 208-pin PQFP (Plastic Quad Flat Pack) |
| 安裝類型 | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) ISP | — |
| Process Technology | CMOS EEPROM | CMOS EEPROM |
| Hot-Socketing Support | Yes | — |
| RoHS 狀態 | Non-compliant (Pb-bearing PQFP package) | — |
| Maximum Frequency (fCNT) | — | 87 MHz |
| Supply Voltage - Core (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V |
| In-System Programmability | — | Yes, IEEE Std. 1532 compliant |
| Boundary-Scan (JTAG) | — | Yes, IEEE 1149.1 |
| PCI-SIG Compliance | — | PCI Local Bus Specification Rev 2.2 (at -10 speed grade) |
| Lead-Free / RoHS | — | [DATA_NEEDED: RoHS status] |