EPM3512ATC144 vs EPM3512ATC144-10N 比較
詳細並排比較 EPM3512ATC144 由 Altera 與 EPM3512ATC144-10N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM3512ATC144 | EPM3512ATC144-10N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | 啟用中 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O Pins | 212 | — |
| 封裝 | TQFP-144 (20x20 mm) | 144-pin TQFP (TC144) |
| Core Supply Voltage | 3.3 V | — |
| Programming Technology | EEPROM (in-system programmable) | — |
| JTAG Interface | IEEE Std. 1149.1 (4-pin) | — |
| Maximum Frequency | 116 MHz | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD in ns] | 10 ns |
| Product Terms per Macrocell | 32 (expandable) | — |
| I/O Standards | LVTTL, LVCMOS, 2.5 V/3.3 V/5 V tolerant | — |
| 工作溫度 | 0C to +70C (commercial) | 0C to +70C (commercial, N suffix) |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | 3 | — |
| RoHS 狀態 | Compliant (lead-free suffix variants available) | [DATA_NEEDED: RoHS compliance from datasheet] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 10000 |
| Maximum User I/O | — | 212 |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: fMAX in MHz] |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5 V (MultiVolt) |
| Configuration Memory | — | Non-volatile EEPROM |
| Programming Interface | — | JTAG (IEEE 1149.1), in-system programmable |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |