EPM5032DI25 vs EPM5032DC-20 比較
詳細並排比較 EPM5032DI25 由 Altera 與 EPM5032DC-20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5032DI25 | EPM5032DC-20 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | UV-erasable EPLD (CMOS EPROM-based) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 2 | — |
| Product Terms | 320 | — |
| Output Macrocells | 16 | — |
| Bidirectional I/O Pins | 16 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 24 | — |
| Pin-to-Pin Delay (tPD) | 25 ns | 20 ns |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V |
| I/O Standard | TTL-compatible | — |
| 封裝 | 24-pin Ceramic DIP (DI) with quartz window | 20-pin DIP (Windowed Ceramic, 0.3" wide) |
| Programming Technology | UV-EPROM (erasable via quartz window) | — |
| Product Family | — | MAX 5000 |
| Programmable Technology | — | UV-Erasable / OTP EPROM |
| Usable Gates | — | 600 |
| Maximum Frequency (fCNT) | — | 71.4 MHz |
| Speed Grade | — | -20 |
| 安裝類型 | — | Through-Hole |
| Logic Blocks | — | 4 Logic Array Blocks (LABs) |
| I/O Pins | — | [DATA_NEEDED: I/O pin count for DIP-20 variant] |
| 工作溫度 | — | [DATA_NEEDED: commercial/industrial/military grade] |
| RoHS 狀態 | — | Compliant (per IC-Components listing) |
| Lead Free | — | [DATA_NEEDED: confirmed lead-free] |
| Manufacturer | — | Altera (now Intel Programmable Solutions Group) |
| Programming Method | — | Altera MAX+PLUS II / Quartus (legacy support) |