EPM5032DM vs EPM5032DC-20 比較
詳細並排比較 EPM5032DM 由 Intel 與 EPM5032DC-20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5032DM | EPM5032DC-20 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | MAX 5000 | — |
| Macrocells | 32 | 32 |
| Propagation Delay (tPD) | 25 ns | — |
| Usable Gates | 600 to 1000 (typical) | 600 |
| Logic Inputs | 32 | — |
| Process Technology | CMOS EEPROM | — |
| 封裝 | CDIP-28 (ceramic windowed DIP, 28-pin) | 20-pin DIP (Windowed Ceramic, 0.3" wide) |
| Supply Voltage (VCC) | 5 V (typical) | 5 V |
| Standby Current | [DATA_NEEDED: ICC standby current] | — |
| 工作溫度 | -55C to +125C (military/extended, ceramic package) | [DATA_NEEDED: commercial/industrial/military grade] |
| Programming Technology | UV-erasable (windowed) EEPROM | — |
| Logic Function | Combinational and registered (synchronous) | — |
| Output Polarity | Programmable | — |
| Program Retention | Non-volatile (EEPROM) | — |
| 安裝類型 | Through-hole (DIP) | Through-Hole |
| RoHS 狀態 | Non-compliant (ceramic DIP with UV window) | Compliant (per IC-Components listing) |
| Lead-Free | No (ceramic DIP contains lead) | — |
| Product Family | — | MAX 5000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Programmable Technology | — | UV-Erasable / OTP EPROM |
| Maximum Frequency (fCNT) | — | 71.4 MHz |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Speed Grade | — | -20 |
| Logic Blocks | — | 4 Logic Array Blocks (LABs) |
| I/O Pins | — | [DATA_NEEDED: I/O pin count for DIP-20 variant] |
| Lead Free | — | [DATA_NEEDED: confirmed lead-free] |
| Manufacturer | — | Altera (now Intel Programmable Solutions Group) |
| Programming Method | — | Altera MAX+PLUS II / Quartus (legacy support) |