EPM5032SC-25 vs EPM5032SC-20 比較
詳細並排比較 EPM5032SC-25 由 Intel 與 EPM5032SC-20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5032SC-25 | EPM5032SC-20 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable/OTP Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 32 | 32 |
| Dedicated Inputs | 7 | 7 |
| Bidirectional I/O | 16 | — |
| Total Pin Count | 28 | — |
| 封裝 | PDSO-28 (Plastic DIP Small Outline, SOIC-28 equivalent) | 20-pin SOIC (Small Outline) |
| Speed Grade | -25 | -20 (20 ns) |
| Propagation Delay (tpd) | 25 ns | — |
| Maximum Counter Frequency (fCNT) | 91 MHz | — |
| Supply Voltage (VCC) | 5 V (typical, 4.5 V to 5.5 V) | — |
| Technology | CMOS, UV-erasable or OTP | CMOS EPROM cell |
| Interconnect | Programmable Interconnect Array (PIA) | Programmable Interconnect Array (PIA) |
| Operating Temperature (Commercial) | 0C to +70C | — |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: RoHS status - legacy Altera part; verify with distributor] | [DATA_NEEDED: RoHS status not confirmed in verified data] |
| Programming Method | Altera programming hardware (legacy iMPACT or MAX+PLUS II) | — |
| I/O Pins | — | 16 |
| Outputs | — | 16 |
| Propagation Delay (tPD) | — | 20 ns |
| Architecture | — | PAL-type, CMOS, UV-erasable |
| 工作溫度 | — | 0 °C to +70 °C (commercial grade) |
| 供應電壓 | — | [DATA_NEEDED: VCC typical range] |
| Programmability | — | One-time programmable (windowless SOIC) |