EPM5128JC-1 vs EPM5128JI 比較
詳細並排比較 EPM5128JC-1 由 Altera 與 EPM5128JI 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5128JC-1 | EPM5128JI |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | Erasable Programmable Logic Device (EPLD/CPLD) | UV-erasable programmable logic device (PLD) |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Maximum Operating Frequency | 62.5 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 40 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Technology | CMOS, UV-erasable EPROM | — |
| 封裝 | 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier) | 68-terminal ceramic CQCC, windowed, J-leads |
| 安裝類型 | Surface Mount | Surface Mount (J-lead CQCC) |
| 工作溫度 | [DATA_NEEDED: temperature grade] | — |
| Programming Interface | JTAG / Altera dedicated programmer | — |
| Configuration Memory | Non-volatile EPROM (UV-erasable) | — |
| RoHS 狀態 | non_compliant (ceramic windowed package) | Non-compliant (ceramic hermetic package) |
| 生命週期狀態 | Obsolete - last-time-buy inventory only | — |
| Device Family | — | MAX 5000 |
| Propagation Delay (tPD) | — | 55 ns (typical) |
| Maximum Internal Frequency | — | 40 MHz |
| Process Technology | — | CMOS |
| Programmable Technology | — | UV-erasable EPROM cell |
| Operating Temperature Grade | — | Industrial ("I" suffix) |
| Programming | — | Altera MAX+plus II compatible programmer + UV eraser |
| Lead Finish | — | Tin-lead (SnPb) over nickel |
| Logic Blocks | — | [DATA_NEEDED: number of LABs / logic array blocks] |
| User I/O Pins | — | [DATA_NEEDED: pin count of user I/Os] |
| 供應電壓 | — | [DATA_NEEDED: VCC range] |
| Standby Current | — | [DATA_NEEDED: ICCSB] |