EPM5130WC-1AA vs EPM5130WM883B-2 比較
詳細並排比較 EPM5130WC-1AA 由 Altera 與 EPM5130WM883B-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5130WC-1AA | EPM5130WM883B-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | MAX 5000 | — |
| Macrocell Count | 128 | — |
| Number of Logic Array Blocks | 8 (typical for MAX 5130) | — |
| Propagation Delay (tPD, max) | 40 ns | — |
| Maximum Toggle Frequency (fCNT) | 50 MHz | — |
| Maximum Clock Frequency (fMAX) | [DATA_NEEDED: fMAX exact value] | — |
| Dedicated Inputs | 19 | 19 |
| I/O Pins | 48 | — |
| Total Inputs (incl. I/O feedback) | 68 | — |
| Total Outputs | 48 | 48 |
| Process Technology | 5 V CMOS, UV-erasable | CMOS |
| 封裝 | Windowed Ceramic WQFP (AA suffix) | [DATA_NEEDED: exact package code] |
| 工作溫度 | [DATA_NEEDED: commercial or industrial temp grade] | [DATA_NEEDED: military temperature range] |
| Supply Voltage (VCC) | 5 V nominal | — |
| Programming Method | UV erase + EPROM programming | UV-erasable (windowed package) |
| RoHS 狀態 | unknown (legacy package, likely non-compliant) | unknown |
| Logic-to-Pin Ratio | Highest in-class per Altera marketing literature | — |
| Family | — | MAX 5000 |
| Device Type | — | UV PLD (UV-erasable programmable logic device) |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tPD, -2 grade) | — | 45 ns |
| Propagation Delay (tPD, -1 grade) | — | 55 ns (EPM5130WM883B base) |
| User I/O Pins | — | 48 |
| Total Inputs | — | 68 |
| Interconnect | — | Programmable Interconnect Array (PIA) - 8 LAB channels |
| External Clock Inputs | — | 1 |
| Development Tool | — | MAX+PLUS II |
| Military Processing | — | MIL-STD-883 Class B (883B suffix) |