EPM5130WM883B-1 vs EPM5130WM883B-2 比較

詳細並排比較 EPM5130WM883B-1 由 Altera 與 EPM5130WM883B-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM5130WM883B-1 EPM5130WM883B-2
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Device Family MAX 5000 (Classic EPLD) —
Manufacturer Altera (now Intel PSG) —
Logic Type UV-Erasable Programmable Logic Device (EPLD) —
Technology CMOS, EPROM cell —
Macrocells 128 128
Logic Array Blocks (LABs) 8 8
Dedicated Inputs 19 19
I/O Pins 48 (bi-directional) —
Propagation Delay (tPD) 55 ns —
Maximum Clock Frequency (fMAX) 33.3 MHz —
Supply Voltage (VCC) 4.5 V to 5.5 V (nominal 5 V) —
External Clock Inputs 1 global + shared inputs 1
Interconnect Programmable Interconnect Array (PIA) Programmable Interconnect Array (PIA) - 8 LAB channels
Package Type CQFP-100, ceramic windowed (WM) —
Military Screening MIL-STD-883 Class B (883B suffix) —
工作溫度 [DATA_NEEDED: military/industrial temperature grade] [DATA_NEEDED: military temperature range]
Programming Method UV erase + EPROM programming UV-erasable (windowed package)
RoHS 狀態 [DATA_NEEDED: confirmed RoHS for ceramic windowed CQFP] unknown
安裝類型 Surface Mount (CQFP with J-leads) —
Family — MAX 5000
Device Type — UV PLD (UV-erasable programmable logic device)
Propagation Delay (tPD, -2 grade) — 45 ns
Propagation Delay (tPD, -1 grade) — 55 ns (EPM5130WM883B base)
User I/O Pins — 48
Total Inputs — 68
Total Outputs — 48
Process Technology — CMOS
Development Tool — MAX+PLUS II
Military Processing — MIL-STD-883 Class B (883B suffix)
封裝 — [DATA_NEEDED: exact package code]

資料表與資源

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