EPM5192AJI84-15 vs EPM5192AJC84-20 比較
詳細並排比較 EPM5192AJI84-15 由 Altera 與 EPM5192AJC84-20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM5192AJC84-20 - 192-Macrocell UV PLD, 33ns, 84-Pin J-Lead | Altera
EPM5192AJC84-20 Obsolete規格比較
| 參數 | EPM5192AJI84-15 | EPM5192AJC84-20 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | MAX 5000 EPLD | — |
| Product Type | UV-Erasable / OTP Complex PLD | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 16 | — |
| User I/O Pins | 84 | — |
| Propagation Delay (tPD) | 15 ns | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | — |
| Process Technology | CMOS EPROM (UV-erasable) | CMOS, UV-erasable EEPROM |
| Package Type | 84-pin JLCC (J-Leaded Ceramic Chip Carrier) with quartz window | — |
| 安裝類型 | Through-Hole (SMD socket-compatible) | Surface Mount (J-Lead) |
| 工作溫度 | -40 °C to +85 °C (Industrial, 'I' suffix) | — |
| Programming Method | UV erase + EPROM program via standard Altera programmer | — |
| Design Tool Support | MAX+PLUS II (legacy); not supported by modern Quartus Prime | — |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free | unknown | — |
| 無鹵素 | unknown | — |
| Functional Equivalent (Plastic OTP) | EPM5192AJC84-15 (windowless plastic JLCC, same die) | — |
| Family | — | MAX 5000 |
| Device Type | — | UV-erasable/OTP Complex PLD (CPLD) |
| Propagation Delay (tpd) | — | 33 ns (speed grade -20) |
| 最大時脈頻率 | — | 66.7 MHz |
| Supply Voltage (Vcc) | — | 4.75 V to 5.25 V |
| Dedicated Inputs | — | 7 |
| User I/O Lines | — | 64 |
| 封裝 | — | 84-pin PLCC J-Lead (WQCCJ, J84) |
| Operating Temperature Grade | — | Commercial |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |
| Programming Tool | — | Altera MAX+PLUS II / Quartus (legacy) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free status] |