EPM5192AJI84-20 vs EPM5192AJC84-20 比較
詳細並排比較 EPM5192AJI84-20 由 Altera 與 EPM5192AJC84-20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM5192AJC84-20 - 192-Macrocell UV PLD, 33ns, 84-Pin J-Lead | Altera
EPM5192AJC84-20 Obsolete規格比較
| 參數 | EPM5192AJI84-20 | EPM5192AJC84-20 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | MAX 5000 (EPM5192) | — |
| Logic Cells / Macrocells | 192 macrocells | — |
| Device Type | UV-Erasable / OTP Complex PLD | UV-erasable/OTP Complex PLD (CPLD) |
| Propagation Delay (tPD) | 33 ns | — |
| Maximum Frequency (fCNT) | 66.7 MHz | — |
| Supply Voltage (VCC) | 5 V nominal (4.5 V to 5.5 V) | — |
| Process Technology | CMOS | CMOS, UV-erasable EEPROM |
| Operating Temperature Grade | Industrial | Commercial |
| Package Code | WQCCJ (JEDEC) | — |
| Package Type | 84-pin J-bend Ceramic Chip Carrier (PLCC-84, JI) | — |
| 安裝類型 | Surface Mount | Surface Mount (J-Lead) |
| Terminal Form | J-Bend | — |
| Number of Terminals | 84 | — |
| Programmability | UV-erasable window + OTP | — |
| 腳位數 | 84 | — |
| 生命週期狀態 | Obsolete (legacy Altera MAX 5000) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status of EPM5192AJI84-20] | [DATA_NEEDED: RoHS status] |
| Family | — | MAX 5000 |
| Macrocells | — | 192 |
| Propagation Delay (tpd) | — | 33 ns (speed grade -20) |
| 最大時脈頻率 | — | 66.7 MHz |
| Supply Voltage (Vcc) | — | 4.75 V to 5.25 V |
| Dedicated Inputs | — | 7 |
| User I/O Lines | — | 64 |
| 封裝 | — | 84-pin PLCC J-Lead (WQCCJ, J84) |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |
| Programming Tool | — | Altera MAX+PLUS II / Quartus (legacy) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free status] |