EPM5192ALI84-20 vs EPM5192ALM84-20 比較
詳細並排比較 EPM5192ALI84-20 由 Altera 與 EPM5192ALM84-20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM5192ALI84-20 - 192-Macrocell MAX 5000 PLD, 84-Pin J-Lead | Altera
EPM5192ALI84-20 Obsolete
規格比較
| 參數 | EPM5192ALI84-20 | EPM5192ALM84-20 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-erasable / OTP Complex PLD) | UV-Erasable/OTP Complex PLD (CPLD) |
| Macrocells | 192 | 192 |
| Process Technology | CMOS, EPROM-based | CMOS |
| Propagation Delay (tPD) | 20 ns (pin-compatible speed grade) | 33 ns |
| User I/O Pins (max) | 84 (in PLCC-84 package) | — |
| 供應電壓 | 5 V (single supply, TTL-compatible I/O) | — |
| Operating Temperature Grade | Industrial (I) | — |
| Package Code | QCCJ (Plastic Leaded Chip Carrier, J-bend) | — |
| Package Type | PLCC-84 (PQCC-84) | — |
| No. of Terminals | 84 | — |
| Form of Terminal | J-BEND | — |
| 安裝類型 | Surface Mount (PLCC socket compatible) | — |
| Programmability | UV-erasable / one-time programmable (OTP) | — |
| Logic Type | Combinatorial and registered, per-macrocell DFF | — |
| I/O Standard | TTL-compatible | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status - Altera MAX 5000 series is generally legacy and may not be RoHS compliant] | unknown (legacy Altera part) |
| User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Total Inputs | — | 71 (64 I/O + 7 dedicated) |
| 最大時脈頻率 | — | 66.7 MHz |
| 封裝 | — | 84-pin PQCC (PLCC), J-Lead, surface-mount |
| Programmable Security Bit | — | Yes |
| Logic Voltage Compatibility | — | 5 V TTL |
| Configuration Memory | — | EPROM (UV-erasable, windowless in this package) |
| 工作溫度 | — | [DATA_NEEDED: commercial/industrial/military grade] |