EPM5192AQI100-15 vs EPM5192AQC100-15 比較
詳細並排比較 EPM5192AQI100-15 由 Intel 與 EPM5192AQC100-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192AQI100-15 | EPM5192AQC100-15 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Series | MAX® 5000 EPLD | — |
| Device Type | OT PLD (One-Time-Programmable EPLD), CMOS | UV-Erasable / OTP Complex PLD (CPLD) |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Programmable I/O Lines | 64 | — |
| Dedicated Inputs | 7 | 7 |
| Total Logical Inputs | 72 | — |
| Propagation Delay (tpd) | 15 ns (speed grade -15) | — |
| Propagation Delay (max datasheet) | 25 ns | — |
| Maximum Internal Frequency | 83.3 MHz | — |
| 封裝 | PQFP-100 (R-PQFP-G100), 100-pin Plastic Quad Flat Pack | 100-pin PQFP (R-PQFP-G100) |
| Operating Temperature Grade | Industrial (-40C to +85C) - 'I' suffix | — |
| Programming Method | JTAG via Altera programming hardware (ByteBlasterMV, USB-Blaster) | — |
| Technology | CMOS, EPROM-based (UV-erasable on windowed versions, OTP on this part) | CMOS |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| 供應電壓 | [DATA_NEEDED: VCC typical value] | — |
| Manufacturer | — | Altera (now Intel) |
| Propagation Delay (tPD) | — | 25 ns (-15 speed grade) |
| Total Inputs | — | 72 |
| User I/O Pins | — | 64 |
| External Clock Inputs | — | 1 |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| 安裝類型 | — | Surface Mount |
| Configuration Memory | — | EPROM (UV-erasable, OTP) |
| 工作溫度 | — | [DATA_NEEDED: operating temperature range] |