EPM5192C-2 vs EPM5192GC-1 比較
詳細並排比較 EPM5192C-2 由 Altera 與 EPM5192GC-1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192C-2 | EPM5192GC-1 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 (Classic) |
| Device Type | Complex Programmable Logic Device (CPLD) | — |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | 64 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Dedicated Inputs | 7 | 7 |
| External Clock Inputs | 1 | — |
| Propagation Delay (PIA, typical) | 45 ns | — |
| Maximum Operating Frequency | 50 MHz | — |
| Process Technology | CMOS | CMOS, UV-erasable / OTP |
| Configuration Memory | EEPROM (non-volatile) | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| Speed Grade | -2 | — |
| Programming Interface | JTAG / Altera MAX+ programming | — |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free | unknown | — |
| Logic Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 3,750 |
| Maximum Propagation Delay (tPD) | — | 40 ns |
| Maximum Frequency (fMAX) | — | 62.5 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| 封裝 | — | 100-pin Ceramic PGA (GC) |
| 安裝類型 | — | Through-Hole (PGA) |
| Configuration Method | — | UV-Erase / One-Time Programmable |
| Interconnect | — | Peripheral Interconnect Array (PIA) |
| 工作溫度 | — | [DATA_NEEDED: operating temperature grade] |