EPM5192LC-M089A vs EPM5192LC 比較
詳細並排比較 EPM5192LC-M089A 由 Altera 與 EPM5192LC 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192LC-M089A | EPM5192LC |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | MAX 5000 | — |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements / Macrocells | 192 macrocells | — |
| Logic Array Blocks (LABs) | 12 | 12 |
| Dedicated Inputs | 7 | 7 |
| I/O Pins | 64 | — |
| Propagation Delay (tPD) | 55 ns | 55 ns (typical, commercial) |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V (nominal 5 V) |
| Process Technology | CMOS | CMOS, UV-erasable/OTP EPROM configuration |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | Programmable Interconnect Array (PIA), fixed delay |
| Clock Inputs | 1 global external clock | — |
| Configuration Mode | UV-erasable / OTP | — |
| Package Code (M089A) | M089A (package/quality variant) | — |
| 安裝類型 | Surface Mount / Through-Hole (variant dependent) | Surface Mount |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Family | — | MAX 7000S |
| Macrocells | — | 192 |
| User I/O Pins | — | 64 |
| Global Clock Inputs | — | 1 |
| Maximum Clock Frequency (fMAX) | — | 50 MHz |
| Boundary-Scan Support | — | JTAG IEEE 1149.1 |
| Programming Interface | — | JTAG (ByteBlaster-compatible) |
| Operating Temperature (commercial) | — | 0C to +70C |
| 封裝 | — | JLCC-68 (windowed ceramic, LC suffix) |