EPM5192LI-2 vs EPM5192LC84-1 比較
詳細並排比較 EPM5192LI-2 由 Altera 與 EPM5192LC84-1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192LI-2 | EPM5192LC84-1 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable/OTP Complex PLD) | EPLD (UV-Erasable / OTP Complex PLD) |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 16 |
| User I/O | 64 | — |
| Total Inputs | 72 (7 dedicated + 64 I/O) | — |
| Propagation Delay (tpd) | 55 ns (max) | — |
| Maximum Internal Frequency | 100 MHz | — |
| 供應電壓 | 4.5 V to 5.5 V | — |
| 工作溫度 | -40 C to +85 C (industrial) | 0C to +70C (commercial) |
| Typical Power Dissipation | 600 mW at 5 V / 25 C | — |
| Technology | CMOS, UV-erasable / OTP | — |
| 封裝 | 84-pin PLCC (J-lead), JEDEC S-PQCC-J84 | 84-pin PLCC (LC84) |
| 安裝類型 | Surface Mount | Surface Mount (J-lead) |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: not stated in provided data] |
| Design Toolchain | Altera MAX+plus II | — |
| Usable Gates | — | 7,500 |
| Speed Grade | — | -1 |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD ns value] |
| Supply Voltage (VCC) | — | 5 V |
| Program Memory Type | — | UV-EPROM / OTP |
| I/O Count | — | [DATA_NEEDED: I/O pin count] |
| Process Technology | — | CMOS EPROM |