EPM570GF256C5N vs EPM570GM256C5N 比較

詳細並排比較 EPM570GF256C5N 由 Intel 與 EPM570GM256C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM570GF256C5N EPM570GM256C5N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Device Family MAX II —
Logic Elements 570 —
Macrocells 440 —
Maximum User I/Os 212 —
Pin-to-Pin Delay (tPD) 5.4 ns —
Maximum Frequency (fMAX) 304 MHz —
User Flash Memory (UFM) 8 Kbits —
Operating Voltage (VCCINT) 3.3 V —
I/O Voltage Support (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V —
封裝 256-ball FineLine BGA (17 x 17 mm, 1.0 mm pitch) —
Process Technology 0.18 µm Flash-based CMOS 0.18 um flash-based CMOS
Configuration Method Non-volatile, instant-on (Flash) —
Programming Interface JTAG (IEEE 1149.1) / ISP —
工作溫度 -40 °C to +125 °C (Industrial) 0 °C to +85 °C (commercial)
Lead-Free / RoHS Yes (Lead-free finish) —
Series — MAX II
Family — CPLD - Complex Programmable Logic Device
Macro Cells — 440
Logic Array Blocks (LABs) — 57
Number of I/Os — 160
Maximum Operating Frequency — 304 MHz
Maximum Internal Frequency (datasheet fMAX) — 201.1 MHz
Pin-to-Pin Logic Delay (Speed Grade C5) — 5 ns
Operating Supply Voltage (Core VCCINT) — 1.71 V to 1.89 V (1.8 V nominal)
I/O Bank Supply Voltages — 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt I/O)
Programmable Type — In System Programmable (ISP) via JTAG
封裝 / 外殼 — 256-ball Micro FineLine BGA, 11x11 mm, 0.8 mm pitch
安裝方式 — SMD/SMT
Packaging — Tray
Lead Free / RoHS Status — See manufacturer page; legacy part - verify per lot
Configuration Memory — Internal flash (non-volatile, instant-on)
JTAG Support — Yes (IEEE 1149.1 / 1532)
Vertical Migration — Pin-compatible with EPM1270 and EPM2210 in the 256-MBGA package

資料表與資源

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