EPM570GT144C5N vs EPM570T144-5 比較
詳細並排比較 EPM570GT144C5N 由 Altera 與 EPM570T144-5 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM570GT144C5N | EPM570T144-5 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX II | MAX II |
| Logic Elements / Macrocells | 440 | — |
| Maximum User I/O Pins | 212 | — |
| Pin-to-Pin Propagation Delay (tPD) | 5.4 ns | — |
| Maximum Internal Frequency (fMAX) | 201.1 MHz | — |
| User Flash Memory | 8 Kbits | — |
| Process Technology | 0.18 µm | 0.18 µm |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| 工作溫度範圍 | 0 °C to +85 °C (Commercial) | — |
| 封裝 | 144-pin TQFP (20 x 20 mm) | TQFP-144 (T144) |
| 安裝類型 | Surface Mount | — |
| Programming Interface | JTAG (IEEE 1149.1) / IEEE 1532 ISP | JTAG (IEEE 1149.1 / IEEE 1532) |
| Configuration Time (Instant-On) | < 1 ms | — |
| RoHS 狀態 | Compliant | Depends on date code (pre-2010 lots non-RoHS; lead-free Pb-free opt. available) |
| Supported I/O Standards | LVCMOS, LVTTL, PCI, SSTL-2, SSTL-3 | — |
| Device | — | EPM570 |
| Logic Elements (LE) | — | 570 |
| Macrocells (typical) | — | 440 |
| User I/O Pins | — | 116 |
| 腳位數 | — | 144 |
| Speed Grade | — | -5 (≈5.0 ns tPD1) |
| Non-volatile Configuration | — | Internal Flash (instant-on) |
| User Flash Memory (UFM) | — | 8 Kbits |
| I/O Banks | — | 4 |
| MultiVolt I/O Support | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V |
| VCCINT | — | 3.3 V or 2.5 V (per bank group) |
| 工作溫度 | — | [DATA_NEEDED: temperature grade for -5 suffix] |