EPM570T100C5N vs EPM570T100A5N 比較
詳細並排比較 EPM570T100C5N 由 Intel 與 EPM570T100A5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM570T100C5N | EPM570T100A5N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Series | MAX II | — |
| Family | CPLD - MAX II | — |
| Logic Elements (LE) | 570 | — |
| Macrocells | 440 | 440 |
| User I/Os | 76 | — |
| User Flash Memory | 8 Kbit | — |
| Process Technology | 0.18 µm 6-layer-metal Flash | — |
| Internal Performance | 201.1 MHz | — |
| 供應電壓 | 2.5 V / 3.3 V | — |
| 工作溫度 | 0 °C to +85 °C (commercial) | -40 °C to +125 °C (industrial) |
| 封裝 | 100-pin TQFP (T100) | 100-pin TQFP |
| 安裝類型 | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) - ISP |
| I/O Standards | 1.5 V / 1.8 V / 2.5 V / 3.3 V MultiVolt | — |
| RoHS 狀態 | Compliant | Compliant |
| Device Family | — | MAX II |
| Logic Elements | — | 570 |
| User I/O Pins | — | 76 |
| Number of Logic Array Blocks (LABs) | — | 57 |
| Pin-to-Pin Logic Delay (tPD) | — | 5.4 ns |
| Maximum Internal Frequency | — | 304 MHz |
| Core Supply Voltage (VCCINT) | — | 1.8 V (typical) |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| User Flash Memory (UFM) | — | 8 Kbits |
| Configuration Memory | — | On-chip non-volatile flash |