EPM570T100C5RR vs EPM570T100C3N 比較

詳細並排比較 EPM570T100C5RR 由 Intel 與 EPM570T100C3N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EPM570T100C5RR EPM570T100C5RR - MAX II CPLD, 570 LEs, 100-TQFP | Intel

EPM570T100C5RR - MAX II CPLD, 570 LEs, 100-TQFP | Intel

EPM570T100C5RR ✓ 啟用中

規格比較

參數 EPM570T100C5RR EPM570T100C3N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Family MAX II MAX II
Product Type CPLD (Complex Programmable Logic Device) —
Logic Elements (LEs) 570 570
Macro Cells 440 440
User I/Os 100 —
Maximum Operating Frequency 201.1 MHz —
Process Technology 0.18 µm CMOS 0.18 µm Flash
Pin-to-Pin Delay 8.7 ns (max) —
供應電壓 2.5 V / 3.3 V —
Core Voltage 1.8 V —
封裝 100-pin TQFP 100-TQFP (T100)
Configuration Memory Internal Flash (non-volatile) —
Programmability JTAG / In-System Programmable —
安裝類型 Surface Mount Surface Mount
RoHS 狀態 [DATA_NEEDED: RoHS status from datasheet] Compliant
工作溫度 Commercial (0 °C to +85 °C) [DATA_NEEDED: confirm temp grade] 0 °C to +85 °C (Commercial)
Maximum User I/Os — 76
Pin-to-Pin Delay (tPD1) — 5.4 ns
Maximum Internal Frequency — 304 MHz
User Flash Memory (UFM) — 8 Kbits
Number of LABs — 57
Supply Voltage - Core — 2.5 V / 3.3 V
I/O Standards Supported — 1.5 V, 1.8 V, 2.5 V, 3.3 V (MultiVolt)
Programming Interface — JTAG / IEEE 1149.1 boundary-scan
In-System Programmable — Yes
Speed Grade — C3

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