EPM570T144C5N vs EPM570T144A5N 比較
詳細並排比較 EPM570T144C5N 由 Intel 與 EPM570T144A5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM570T144C5N | EPM570T144A5N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX II | MAX II |
| Series | MAX II Device | — |
| Logic Elements (LEs) | 570 | — |
| Macrocells | 440 | — |
| User I/Os | 116 | — |
| Internal User Flash Memory | 8 Kbit | — |
| Global Clocks | 4 | — |
| Process Technology | 0.18 µm 6-layer-metal flash | 0.18 µm |
| Core Voltage (VCCINT) | 1.8 V (typical, internally regulated) | — |
| I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-voltage, per bank) | — |
| Maximum User I/O Pins | 116 | — |
| Propagation Delay (tPD) | 5.5 ns (typical, [DATA_NEEDED: exact speed grade]) | 5.4 ns |
| Maximum Frequency (fMAX) | 201.1 MHz | — |
| 工作溫度 | 0 °C to +85 °C (commercial, C5 grade) | — |
| 封裝 | TQFP-144 (20 × 20 mm, 0.5 mm pitch) | 144-pin TQFP (T144) |
| 安裝類型 | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | JTAG (IEEE 1149.1) / In-System Programmable |
| Configuration Storage | On-chip non-volatile flash | — |
| Supported I/O Standards | LVCMOS, LVTTL, PCI, LVDS, SSTL (per bank VCCIO) | — |
| RoHS 狀態 | Compliant | Compliant |
| Lead-Free | Yes | — |
| MSL 等級 | 3 (per JEDEC J-STD-020) | — |
| Design Software | Intel Quartus II (MAX II device support) | — |
| Device | — | EPM570 |
| Logic Elements (LE) | — | 570 |
| Macro Cells | — | 440 |
| Maximum Operating Frequency | — | 201.1 MHz |
| Core Voltage | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-voltage) |
| User I/O Pins | — | 144 |
| User Flash Memory (UFM) | — | 8 Kbits |
| Operating Temperature Grade | — | Automotive (-40 °C to +125 °C) |
| Configuration Memory | — | Internal Flash (non-volatile, instant-on) |