EPM570ZM100C6N vs EPM570F100C5N 比較
詳細並排比較 EPM570ZM100C6N 由 Altera 與 EPM570F100C5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM570ZM100C6N | EPM570F100C5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Series | MAX II | — |
| Device Family | EPM570 (MAX II Z) | — |
| Logic Elements (LEs) | 570 | — |
| Equivalent Macrocells | 440 | — |
| User I/Os | 76 | 76 |
| Propagation Delay (tPD) | 9 ns | 5.4 ns |
| Internal Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbit |
| Programmable Type | In System Programmable (Flash) | — |
| Process Technology | 0.18 µm 6-layer-metal flash | 0.18 micron CMOS |
| 工作溫度 | -40 °C to +125 °C (industrial) | 0C to 85C (TJ) |
| 封裝 | 100-ball FineLine BGA (6x6 mm, 0.5 mm pitch) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | 3 | — |
| Lead Free / RoHS | Lead Free, RoHS Compliant | Yes (per verified data) |
| Design Software | Altera Quartus II | — |
| JTAG Standard | IEEE Std 1149.1 / IEEE 1532 | — |
| Family | — | MAX II |
| Logic Elements | — | 570 |
| Number of Macrocells | — | 440 |
| Number of Logic Array Blocks | — | 57 |
| Supply Voltage - Internal | — | 2.5 V, 3.3 V |
| I/O Standards Supported | — | 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL |
| 封裝 / 外殼 | — | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch |
| Supplier Device Package | — | 100-FBGA |
| Configuration Memory | — | On-chip Flash (instant-on, non-volatile) |
| In-System Programmability | — | Yes (JTAG, IEEE 1532) |
| Programming Interface | — | JTAG (IEEE 1149.1) |