EPM570ZM100C6N vs EPM570GM100I5N 比較
詳細並排比較 EPM570ZM100C6N 由 Altera 與 EPM570GM100I5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM570ZM100C6N | EPM570GM100I5N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Series | MAX II | EPM570 |
| Device Family | EPM570 (MAX II Z) | — |
| Logic Elements (LEs) | 570 | — |
| Equivalent Macrocells | 440 | — |
| User I/Os | 76 | — |
| Propagation Delay (tPD) | 9 ns | — |
| Internal Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Programmable Type | In System Programmable (Flash) | — |
| Process Technology | 0.18 µm 6-layer-metal flash | — |
| 工作溫度 | -40 °C to +125 °C (industrial) | -40C to +85C (industrial grade) |
| 封裝 | 100-ball FineLine BGA (6x6 mm, 0.5 mm pitch) | 100-MBGA (FineLine BGA), 0.5 mm pitch |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | 3 | — |
| Lead Free / RoHS | Lead Free, RoHS Compliant | — |
| Design Software | Altera Quartus II | — |
| JTAG Standard | IEEE Std 1149.1 / IEEE 1532 | — |
| Family | — | MAX II |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | — | 440 |
| Number of Logic Elements | — | 570 |
| Number of Logic Array Blocks (LABs) | — | 57 |
| Number of User I/Os | — | 76 |
| Maximum Operating Frequency | — | 201.1 MHz |
| Pin-to-Pin Propagation Delay | — | 5.4 ns |
| Operating Supply Voltage (Core) | — | 1.8 V |
| I/O Bank Supply Voltage Range | — | 1.5 V to 3.3 V |
| Configuration Memory | — | On-chip non-volatile flash (instant-on) |
| Programming Interface | — | JTAG (IEEE 1149.1) |
| RoHS 狀態 | — | Compliant |
| Speed Grade | — | 5 |