EPM7096LC68-15 vs EPM7096LC84-7 比較
詳細並排比較 EPM7096LC68-15 由 Altera 與 EPM7096LC84-7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7096LC68-15 | EPM7096LC84-7 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | MAX 7000 | MAX 7000 |
| Macrocells | 96 | 96 |
| Logic Array Blocks (LABs) | 4 | 4 |
| User I/O Pins | 52 | 64 |
| Propagation Delay (tPD) | 15 ns | — |
| Supply Voltage (VCCINT/VCCIO) | 4.75 V to 5.25 V (5 V nominal) | — |
| Programmable Technology | EEPROM (second-generation MAX architecture) | — |
| In-System Programming | Yes (IEEE 1149.1 JTAG) | — |
| Logic Gates (typical) | 1800 gates | — |
| Memory Bits | Non-volatile configuration, 100 erase/program cycles per macrocell | — |
| 封裝 | PLCC-68 (LC68) | 84-pin PLCC (Plastic Leaded Chip Carrier) |
| 安裝類型 | Surface Mount (PLCC socket compatible) | Surface Mount |
| 工作溫度 | 0C to +70C (commercial) | 0C to +70C (commercial, LC suffix) |
| Lead-Free / RoHS | Compliant per Altera product page | — |
| Programming Tool Support | Altera MAX+PLUS II, Quartus II; ByteBlaster / ByteBlasterMV | — |
| Speed Grade (tPD) | — | 7.5 ns |
| 供應電壓 | — | 5.0 V |
| Programming Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Architecture | — | Second-generation MAX |
| I/O Logic Levels | — | 5.0 V TTL/CMOS-compatible |
| RoHS 狀態 | — | Non-compliant (original Altera product, leaded PLCC package) |
| 生命週期狀態 | — | Obsolete - PCN/PDN issued by Intel |