EPM7096LC84-10 vs EPM7128ELC84-12 比較

詳細並排比較 EPM7096LC84-10 由 Intel 與 EPM7128ELC84-12 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM7096LC84-10 EPM7128ELC84-12
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Family MAX 7000 MAX 7000 (MAX 7000E series)
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 96 128
Logic Array Blocks (LABs) 4 8
Maximum User I/O Pins 36 —
Propagation Delay (tPD) 10 ns (-10 speed grade) —
封裝 84-PLCC (J-Lead) 84-pin PLCC (J-Lead, QCCJ)
Process Technology EEPROM-based, 5.0 V low-power CMOS (L) —
Supply Voltage (VCC) 5.0 V nominal (4.75 V - 5.25 V) —
In-System Programmability Yes, via IEEE 1149.1 JTAG —
MultiVolt I/O 2.5 V / 3.3 V / 5.0 V mixed-voltage interface —
工作溫度範圍 0C to +70C (Commercial, 'C') —
Configuration Memory Non-volatile EEPROM (instant-on) —
Programmable Interconnect PIA (Programmable Interconnect Array) —
安裝類型 Surface Mount (PLCC socket or SMT) Surface Mount (PLCC socket compatible)
RoHS 狀態 [DATA_NEEDED: RoHS status] Non-compliant (legacy 5V part, SnPb finish)
Logic Family — CMOS, EEPROM-based
Usable Gates — 2,500
User I/Os — 84
Propagation Delay (tpd1) — 12 ns
Internal Global Clock Frequency — 90.9 MHz
Setup Time — 4.5 ns
Supply Voltage (VCCINT / VCCIO) — 5 V (4.75 V to 5.25 V)
工作溫度 — 0C to +70C (commercial)
Programming Interface — JTAG (IEEE 1149.1) / ISP
腳位數 — 84

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