EPM7096LC84-7 vs EPM7096QC100-10 比較
詳細並排比較 EPM7096LC84-7 由 Intel 與 EPM7096QC100-10 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM7096QC100-10 - 96-Macrocell MAX 7000 CPLD, 10ns, PQFP-100 | Altera
EPM7096QC100-10 Obsolete規格比較
| 參數 | EPM7096LC84-7 | EPM7096QC100-10 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 7000 | MAX 7000 |
| Macrocells | 96 | 96 |
| Logic Array Blocks (LABs) | 4 | — |
| User I/O Pins | 64 | 76 |
| Speed Grade (tPD) | 7.5 ns | — |
| 封裝 | 84-pin PLCC (Plastic Leaded Chip Carrier) | 100-pin PQFP (R-PQFP-G100, 20×14 mm, 0.65 mm pitch) |
| 安裝類型 | Surface Mount | Surface Mount |
| 供應電壓 | 5.0 V | — |
| Programming Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Architecture | Second-generation MAX | — |
| I/O Logic Levels | 5.0 V TTL/CMOS-compatible | — |
| 工作溫度 | 0C to +70C (commercial, LC suffix) | 0 °C to +70 °C (commercial) |
| RoHS 狀態 | Non-compliant (original Altera product, leaded PLCC package) | [DATA_NEEDED: RoHS compliance status] |
| 生命週期狀態 | Obsolete - PCN/PDN issued by Intel | — |
| Logic Array Blocks | — | 4 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Operating Frequency | — | 100 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Technology | — | EEPROM-based CMOS |
| Programming Interface | — | ByteBlaster / parallel (JTAG ISP on MAX 7000S variants) |
| Boundary Scan | — | IEEE Std. 1149.1 (JTAG) on MAX 7000S |
| PCI Compliance | — | Yes (PCI SIG Local Bus Specification Rev. 2.2 at -10 speed grade) |