EPM7096LC84-7 vs EPM7128ELC84-12 比較
詳細並排比較 EPM7096LC84-7 由 Intel 與 EPM7128ELC84-12 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7096LC84-7 | EPM7128ELC84-12 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 7000 | MAX 7000 (MAX 7000E series) |
| Macrocells | 96 | 128 |
| Logic Array Blocks (LABs) | 4 | 8 |
| User I/O Pins | 64 | — |
| Speed Grade (tPD) | 7.5 ns | — |
| 封裝 | 84-pin PLCC (Plastic Leaded Chip Carrier) | 84-pin PLCC (J-Lead, QCCJ) |
| 安裝類型 | Surface Mount | Surface Mount (PLCC socket compatible) |
| 供應電壓 | 5.0 V | — |
| Programming Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Architecture | Second-generation MAX | — |
| I/O Logic Levels | 5.0 V TTL/CMOS-compatible | — |
| 工作溫度 | 0C to +70C (commercial, LC suffix) | 0C to +70C (commercial) |
| RoHS 狀態 | Non-compliant (original Altera product, leaded PLCC package) | Non-compliant (legacy 5V part, SnPb finish) |
| 生命週期狀態 | Obsolete - PCN/PDN issued by Intel | — |
| Logic Family | — | CMOS, EEPROM-based |
| Usable Gates | — | 2,500 |
| User I/Os | — | 84 |
| Propagation Delay (tpd1) | — | 12 ns |
| Internal Global Clock Frequency | — | 90.9 MHz |
| Setup Time | — | 4.5 ns |
| Supply Voltage (VCCINT / VCCIO) | — | 5 V (4.75 V to 5.25 V) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| 腳位數 | — | 84 |