EPM7128AEFC100-5 vs EPM7128AETC100-10 比較
詳細並排比較 EPM7128AEFC100-5 由 Altera 與 EPM7128AETC100-10 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7128AEFC100-5 | EPM7128AETC100-10 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | Obsolete |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 7000A | MAX 7000A |
| Logic Family / Base Number | EPM7128A | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | 2.5K |
| Propagation Delay (tPD) | 5 ns | — |
| Internal Frequency (fMAX) | 192.3 MHz | — |
| User I/Os | 84 | 84 |
| Logic Family | CMOS | — |
| 供應電壓 | 3.3 V | — |
| 封裝 | 100-ball FBGA (FineLine BGA) | 100-pin TQFP (ET) |
| 腳位數 | 100 | — |
| 安裝類型 | Surface Mount | — |
| Programmable Type | EEPROM (In-System Programmable) | — |
| 工作溫度 | 0C to +70C (Commercial) | -40C to +85C (commercial/industrial) |
| JTAG Support | Yes (IEEE 1149.1 Boundary Scan) | IEEE 1149.1 boundary-scan |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Compliant |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 8 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Tolerance | — | 5.0 V tolerant |
| Program Technology | — | EEPROM (in-system programmable) |
| 生命週期狀態 | — | Obsolete (migrate to MAX II or MAX V) |