EPM7128AETC144-10N vs EPM7128AETC144-10 比較
詳細並排比較 EPM7128AETC144-10N 由 Intel 與 EPM7128AETC144-10 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7128AETC144-10N | EPM7128AETC144-10 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | NRND |
| Family | MAX 7000A | MAX 7000A |
| Number of Macros | 128 | — |
| Logic Gates | 2,500 usable gates | — |
| Number of I/O Pins | 100 (max user I/O) | — |
| Propagation Delay (tPD) | 10 ns (grade -10) | — |
| Internal Frequency | Up to 250 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Standards | 2.5 V / 3.3 V / 5 V multiVolt | — |
| Configuration Memory | CMOS EEPROM (non-volatile) | — |
| JTAG Support | IEEE 1149.1 compliant boundary-scan | — |
| 封裝 | 144-pin TQFP (T144) | 144-pin TQFP (also referred to as LQFP-144) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0 C to +70 C (commercial) | 0C to +70C (Commercial) |
| RoHS 狀態 | [DATA_NEEDED: rohs status] | [DATA_NEEDED: rohs status from manufacturer] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Macrocells | — | 128 |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | 8 |
| Maximum User I/Os | — | 36 |
| Pin-to-pin Logic Delay (tPD) | — | 10 ns |
| Maximum Internal Counter Frequency | — | 98 MHz |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Voltage Tolerance | — | 2.5 V / 3.3 V / 5 V |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) and ByteBlaster |
| Non-volatile Memory | — | EEPROM, instant-on |
| Global Clocks / Global OE | — | 2 / 2 |
| MSL 等級 | — | MSL 3 (per JEDEC J-STD-020) |