EPM7128EQC100-10 vs EPM7128BTC100-10 比較
詳細並排比較 EPM7128EQC100-10 由 Altera 與 EPM7128BTC100-10 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7128EQC100-10 | EPM7128BTC100-10 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Family | MAX 7000 | MAX 7000B |
| Logic Family | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | 2.5K |
| Logic Array Blocks (LABs) | 4 | 8 (16 macrocells each) |
| User I/O Pins | 84 | — |
| Propagation Delay (tpd) | 10 ns | — |
| Internal Performance | 100 MHz | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| Technology | 5.0 V CMOS, EEPROM-based | CMOS EEPROM |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | — |
| 封裝 | 100-pin PQFP (Plastic Quad Flat Pack), gull-wing leads | TQFP-100 |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0 °C to +90 °C (Commercial) | 0C to +70C (commercial) |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | Compliant (lead-free) |
| User I/Os | — | 84 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Frequency (fCNT) | — | 125 MHz |
| Core Voltage (VCCINT) | — | 2.5 V |
| I/O Voltage (VCCIO) | — | 3.3 V (5V tolerant inputs) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |