EPM7128SQC160-10 vs EPM7128SQC160-10N 比較
詳細並排比較 EPM7128SQC160-10 由 Altera 與 EPM7128SQC160-10N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM7128SQC160-10 - MAX 7000 CPLD, 128 Cells, 100 I/O, 10ns | Altera
EPM7128SQC160-10 Obsolete規格比較
| 參數 | EPM7128SQC160-10 | EPM7128SQC160-10N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Family | MAX 7000 | MAX 7000 |
| Series | MAX 7000S | — |
| Macro Cells | 128 | 128 |
| Usable Gates | 2,500 | 2,500 |
| Logic Array Blocks (LABs) | 8 | — |
| User I/O Pins | 100 | — |
| Maximum Operating Frequency | 100 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Supply Voltage (VCCINT) | 5 V | 5 V |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5 V | — |
| Configuration Memory | Non-volatile EEPROM | — |
| Programming Interface | JTAG (IEEE 1149.1) / ByteBlaster | — |
| 封裝 | 160-pin PQFP | 160-pin PQFP |
| Lead Pitch | 0.65 mm | — |
| 工作溫度 | 0C to +70C (commercial) | -40C to +85C (industrial, N suffix) |
| 安裝類型 | Surface Mount | Surface Mount |
| Compliance | RoHS - see notes | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| User I/Os | — | 100 |
| Logic Elements | — | 160 LE (per datasheet macrocell blocks) |
| Operating Frequency (Counter) | — | 100 MHz |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Counter Frequency (fCNT) | — | 175.4 MHz |
| Programming Technology | — | EEPROM (non-volatile) |
| JTAG Support | — | Yes (IEEE 1149.1 BST) |
| In-System Programmable | — | Yes |
| Speed Grade | — | -10 (10 ns pin-to-pin) |