EPM7160STC100-10F vs EPM7160STI100-10 比較
詳細並排比較 EPM7160STC100-10F 由 Intel 與 EPM7160STI100-10 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7160STC100-10F | EPM7160STI100-10 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | Obsolete |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 160 | 160 |
| Usable Gates | 3,200 | 3,200 |
| Maximum User I/O Pins | 84 | — |
| Dedicated Inputs | 4 | — |
| Propagation Delay (tPD) | 10 ns | 10 ns |
| Maximum Frequency (fMAX) | 100 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| Process Technology | CMOS, EEPROM-based | — |
| Programmability | In-System Programmable (ISP) via JTAG (IEEE 1149.1) | — |
| 封裝 | 100-pin TQFP (1.0 mm height, lead-free) | TQFP-100 (100-pin Thin Quad Flat Pack) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0 °C to +70 °C (commercial) | -40 C to +85 C (Industrial) |
| RoHS 狀態 | Lead-free (suffix F indicates Pb-free) | [DATA_NEEDED: RoHS status - not explicitly stated in provided data] |
| User I/Os | — | 84 |
| Logic Elements / Blocks | — | 16 Logic Array Blocks (LABs) |
| Maximum Operating Frequency | — | 100 MHz |
| Internal Supply Voltage | — | 4.75 V to 5.25 V |
| I/O Supply Voltage | — | 5.0 V |
| Programmable Type | — | In-System Programmable (EEPROM) |
| JTAG / Boundary Scan | — | IEEE Std. 1149.1 compliant |
| PCI Compliance | — | PCI Local Bus Specification Rev. 2.2 (for -10 speed grade) |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |