EPM7160STC100-6N vs EPM7160STC100-10N 比較
詳細並排比較 EPM7160STC100-6N 由 Altera 與 EPM7160STC100-10N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM7160STC100-10N - MAX 7000 CPLD, 160 Macrocells, TQFP-100 | Altera
EPM7160STC100-10N Obsolete規格比較
| 參數 | EPM7160STC100-6N | EPM7160STC100-10N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 7000S | MAX 7000S |
| Logic Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 160 | — |
| User I/Os | 84 | 84 |
| Gates (typical) | 3,200 | — |
| Propagation Delay (tPD) | 6 ns | 10 ns |
| Internal Frequency | 149.3 MHz (max) | — |
| 供應電壓 | 5 V | — |
| Program Memory Type | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| 封裝 | TQFP-100 (T100) | TQFP-100 (1 mm height, plastic) |
| Package Code | LFQFP, S Gull-Wing | — |
| 工作溫度 | 0 °C to +70 °C (Commercial) | 0C to +70C (Commercial) |
| Logic Family | CMOS | CMOS |
| I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Macrocells | — | 160 |
| Equivalent Gates | — | 3.2K |
| Internal Operating Frequency | — | 167 MHz max |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| I/O Voltage (VCCIO) | — | 3.0 V to 5.25 V (MultiVolt) |
| Programmable Type | — | In-System Programmable (ISP) via JTAG |
| Configuration Memory | — | EEPROM (non-volatile) |
| 安裝類型 | — | Surface Mount |
| JTAG (IEEE 1149.1) | — | Yes |
| PCI Compliance | — | Yes (66 MHz) |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |