EPM7256AEFC100-10N vs EPM7256AEFI100-7 比較
詳細並排比較 EPM7256AEFC100-10N 由 Altera 與 EPM7256AEFI100-7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM7256AEFC100-10N - MAX 7000 CPLD, 256 Macro, 10ns, 100-FBGA | Altera
EPM7256AEFC100-10N Nrnd
規格比較
| 參數 | EPM7256AEFC100-10N | EPM7256AEFI100-7 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | NRND |
| Manufacturer | Altera (now Intel) | — |
| Series | MAX 7000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 256 | — |
| Logic Array Blocks (LABs) | 16 | — |
| User I/O | 84 | — |
| Number of Gates | 5000 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Frequency (fMAX) | 154.8 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Tolerance | 5 V tolerant (multiVolt I/O) | — |
| Programmability | EEPROM, In-System Programmable (JTAG IEEE 1149.1) | In-system programmable (ISP) via JTAG |
| 封裝 | 100-LBGA (11 x 11 mm), FineLine BGA | 100-ball FBGA (FineLine BGA), 11x11 mm |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0°C to +70°C (commercial) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Not Compliant (per Arrow listing) |
| Process Technology | 0.30 µm EEPROM CMOS | — |
| Logic Family | — | MAX 7000A |
| Number of Macrocells | — | 256 |
| Number of Usable Gates | — | 5K |
| Number of User I/O | — | 84 |
| Pin-to-Pin Delay (Speed Grade) | — | 7.5 ns |
| Maximum Operating Frequency | — | 126.6 MHz |
| Core Supply Voltage | — | 3.3 V |
| MultiVolt I/O Support | — | 2.5 V / 3.3 V / 5.0 V |
| Operating Temperature Range (Industrial) | — | -40 C to +85 C |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |