EPM7256AEFI100-7 vs EPM7256AETI100-7N 比較
詳細並排比較 EPM7256AEFI100-7 由 Intel 與 EPM7256AETI100-7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7256AEFI100-7 | EPM7256AETI100-7N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | 最後購買 |
| Logic Family | MAX 7000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Number of Macrocells | 256 | — |
| Number of Usable Gates | 5K | — |
| Number of User I/O | 84 | — |
| Pin-to-Pin Delay (Speed Grade) | 7.5 ns | — |
| Maximum Operating Frequency | 126.6 MHz | 126.6 MHz |
| Core Supply Voltage | 3.3 V | — |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5.0 V | — |
| Programmability | In-system programmable (ISP) via JTAG | In-system programmable via JTAG (IEEE 1149.1) |
| 封裝 | 100-ball FBGA (FineLine BGA), 11x11 mm | 100-pin TQFP (TQ100, 14x14 mm, 0.5 mm pitch) |
| Operating Temperature Range (Industrial) | -40 C to +85 C | — |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | Not Compliant (per Arrow listing) | Compliant |
| Family | — | MAX 7000A |
| Macrocells | — | 256 |
| Usable Gates | — | 5,000 |
| Maximum User I/O | — | 84 |
| Logic Elements / Blocks | — | 16 Logic Array Blocks |
| Propagation Delay (tPD) | — | 7.5 ns |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V |
| Technology | — | CMOS, EEPROM-based configuration |
| 工作溫度 | — | -40C to +85C (Industrial) |
| MSL 等級 | — | 3 (168 hours) |