EPM7256AETC144-5N vs EPM7256AETI144-7 比較
詳細並排比較 EPM7256AETC144-5N 由 Altera 與 EPM7256AETI144-7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7256AETC144-5N | EPM7256AETI144-7 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | NRND |
| Family | MAX 7000A | MAX 7000A |
| Logic Family | CMOS | — |
| Usable Gates | 5,000 | 5,000 |
| Macro Cells | 256 | — |
| Logic Blocks | 16 | — |
| User I/Os (Mouser listing) | 36 | — |
| User I/Os (DigChip listing) | 84 | — |
| Pin-to-Pin Propagation Delay (tPD) | 4.5 ns | — |
| Maximum Internal Frequency | 227.3 MHz | — |
| Counter Speed | 172.4 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| Program Memory Type | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG) | — |
| 封裝 | TQFP-144 (Plastic Thin Quad Flat Pack) | TQFP-144 (20x20 mm, 0.5 mm pitch) |
| 工作溫度 | [DATA_NEEDED: operating temperature grade] | -40C to +85C (Industrial) |
| Lead-Free / RoHS | Yes (N suffix) | — |
| Speed Grade | -5 | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 256 |
| User I/Os | — | 36 |
| Logic Array Blocks (LABs) | — | 16 |
| Pin-to-Pin Delay (tPD) | — | 7 ns |
| Maximum Frequency (fMAX) | — | 126.6 MHz |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Standard Support | — | MultiVolt (2.5 V / 3.3 V / 5 V) |
| Programming Interface | — | IEEE 1149.1 (JTAG) / ByteBlaster |
| Configuration Memory | — | Non-volatile EEPROM (instant-on, no boot PROM) |
| RoHS 狀態 | — | [DATA_NEEDED: rohs status] |
| 安裝類型 | — | Surface Mount |