EPM7256SQI208-10 vs EPM7256SQC208-10 比較
詳細並排比較 EPM7256SQI208-10 由 Altera 與 EPM7256SQC208-10 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7256SQI208-10 | EPM7256SQC208-10 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Device Family | MAX 7000 (EPM7256) | — |
| Macrocells | 256 | 256 |
| Usable Gates | 5000 | 5000 |
| Logic Array Blocks | 16 | — |
| Maximum User I/O Pins | 164 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Supply Voltage Range | 4.5 V to 5.5 V | — |
| Technology | CMOS EEPROM | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programmable | Yes (IEEE 1149.1 JTAG) | — |
| 封裝 | 208-pin PQFP (QFP208) | 208-pin PQFP |
| Package Body Material | Plastic/Epoxy | — |
| Terminal Form | Gull Wing | — |
| 工作溫度範圍 | -40 C to +85 C (Industrial) | [DATA_NEEDED: operating temperature range] |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| JESD-30 Package Code | S-PQFP-G208 | — |
| JESD-609 Terminal Finish Code | E3 | — |
| Device Type | — | Complex Programmable Logic Device (CPLD) |
| Family / Series | — | MAX 7000 |
| Logic Array Blocks (LABs) | — | 16 |
| User I/O Pins | — | 164 |
| Pin-to-Pin Propagation Delay (tPD) | — | 10 ns |
| 供應電壓 | — | 5.0 V |
| Configuration Technology | — | EEPROM |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| In-System Programmability | — | Yes (ISP) |
| 濕度敏感等級 (MSL) | — | [DATA_NEEDED: MSL level] |
| Speed Grade | — | -10 (10 ns) |