EPM7256SRC208-10N vs EPM7256SRC208-10 比較

詳細並排比較 EPM7256SRC208-10N 由 Intel 與 EPM7256SRC208-10 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EPM7256SRC208-10N EPM7256SRC208-10N - MAX 7000S CPLD 256 Macro | Intel

EPM7256SRC208-10N - MAX 7000S CPLD 256 Macro | Intel

EPM7256SRC208-10N Obsolete

規格比較

參數 EPM7256SRC208-10N EPM7256SRC208-10
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Family MAX 7000S MAX 7000S
Macrocells 256 —
Usable Gates 5,000 —
User I/O Pins 164 —
Pin-to-Pin Delay (tPD) 10 ns —
Maximum Counter Frequency 100 MHz —
供應電壓 5.0 V —
Configuration Memory EEPROM (non-volatile) —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
封裝 208-pin RQFP (PowerQuad Flat Pack) 208-pin RQFP (BFQFP) exposed pad, 28x28 mm
安裝類型 Surface Mount Surface Mount
工作溫度 0C to +70C (commercial) 0C to +70C (TA, commercial)
RoHS 狀態 Compliant (N suffix = lead-free) [DATA_NEEDED: RoHS status]
Logic Levels 5.0 V TTL/CMOS compatible —
Number of Logic Array Blocks [DATA_NEEDED: number of LABs] —
Maximum User Flash Memory [DATA_NEEDED: user flash memory] —
Number of Macrocells — 256
Number of Logic Array Blocks (LABs) — 16
Number of Gates — 5000
Number of User I/O Pins — 164
Maximum Propagation Delay (tPD) — 10 ns
Maximum Operating Frequency — 100 MHz
Supply Voltage (Internal) — 4.75 V to 5.25 V
Programmable Type — In System Programmable (ISP, JTAG)
Configuration Technology — EEPROM
Terminal Form — Gull Wing
Package Shape — Square
Product Status — Obsolete

資料表與資源

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