EPM9320ALC84-10 vs EPM9320LC84-10 比較
詳細並排比較 EPM9320ALC84-10 由 Intel 與 EPM9320LC84-10 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9320ALC84-10 | EPM9320LC84-10 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | MAX 9000 | MAX 9000 EPLD |
| Device | EPM9320 | EPM9320 |
| Macrocells | 320 | 320 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O Pins | 52 | 168 (varies by package) |
| Dedicated Inputs | 16 | — |
| Speed Grade | -10 (10 ns pin-to-pin delay) | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| In-System Programmability | 5.0 V ISP via IEEE 1149.1 JTAG | — |
| Technology | CMOS EEPROM-based, third-generation MAX | — |
| PCI Compliance | PCI Local Bus Specification Rev. 2.2 (speed grade -10) | — |
| 封裝 | 84-pin PLCC (J-Lead) | 84-pin PLCC (JEDEC MO-047) |
| 工作溫度 | [DATA_NEEDED: commercial/industrial grade] | 0C to +70C (commercial) [DATA_NEEDED: exact grade suffix] |
| 安裝類型 | Surface Mount / Through-Hole (PLCC socket) | Surface Mount (PLCC socket also common) |
| RoHS 狀態 | [DATA_NEEDED] | ROHS3 Compliant (per fpgalink listing) |
| Non-Volatile Configuration | Yes (EEPROM cell, powers up in known state) | — |
| Architecture | MAX (Multiple Array MatriX) with FastTrack Interconnect | — |
| Usable Gates | — | 6000 (typical) |
| Pin-to-Pin Logic Delay (tPD) | — | 10 ns |
| Maximum Frequency (fCNT) | — | [DATA_NEEDED: fCNT in MHz] |
| Supply Voltage (VCC) | — | 5.0 V (typical, see datasheet) |
| Process Technology | — | 0.7 µm CMOS EEPROM/UV-EPROM |
| Programming Interface | — | JTAG (IEEE 1149.1) boundary-scan, Altera ByteBlaster compatible |
| Configuration | — | Non-volatile EEPROM (instant-on, no boot PROM) |
| 濕度敏感等級 (MSL) | — | MSL-3, 168 hours (per fpgalink listing) |
| Manufacturer Lead Time | — | 1-7 days (per fpgalink listing) |